The densification of integrated circuits in semiconductor technology has been accompanied by a need to manufacture very fine interconnections within these integrated circuits. Ultra-fine patterns are typically created by forming patterns in a photoresist coating using photolithographic techniques. Generally, in these processes, a thin coating of a film of a photoresist composition is first applied to a substrate material, such as silicon wafers used for making integrated circuits. The coated substrate is then baked to evaporate any solvent in the photoresist composition and to fix the coating onto the substrate. The baked coated surface of the substrate is next subjected to an image-wise exposure to radiation. This radiation exposure causes a chemical transformation in the exposed areas of the coated surface. Visible light, ultraviolet (UV) light, electron beam and X-ray radiant energy are radiation types commonly used today in microlithographic processes. After this image-wise exposure, the coated substrate is treated with a developer solution to dissolve and remove either the radiation-exposed or the unexposed areas of the photoresist.
Miniaturization of integrated circuits requires the printing of narrower and narrower dimensions within the photoresist. Various technologies have been developed to shrink the dimensions to be printed by the photoresist, examples of such technologies are, multilevel coatings, antireflective coatings, phase-shift masks, photoresists which are sensitive at shorter and shorter wavelengths, etc.
One important process for printing smaller dimensions relies on the technique of forming a thin layer on top of the photoresist pattern, thus widening the photoresist image and reducing the dimension of the space between adjacent photoresist features. This narrowed space can be used to etch and define the substrate or be used to deposit materials, such as metals. This bilevel technique allows much smaller dimensions to be defined as part of the manufacturing process for microelectronic devices, without the necessity of reformulating new photoresist chemistries. The top coating layer or shrink material may be an inorganic layer such as a dielectric material, or it may be organic such as a crosslinkable polymeric material.
Dielectric shrink materials are described in U.S. Pat. No. 5,863,707, and comprise silicon oxide, silicon nitride, silicon oxynitride, spin on material or chemical vapor deposited material. Organic polymeric coatings are described in U.S. Pat. No. 5,858,620, where such coatings undergo a crosslinking reaction in the presence of an acid, thereby adhering to the photoresist surface, but are removed where the top shrink coating has not been crosslinked. U.S. Pat. No. 5,858,620 discloses a method of manufacturing a semiconductor device, where the substrate has a patterned photoresist which is coated with a top layer, the photoresist is then exposed to light and heated so that the photogenerated acid in the photoresist diffuses through the top layer and can then crosslink the top layer. The extent to which the acid diffuses through the top coat determines the thickness of the crosslinked layer. The portion of the top layer that is not crosslinked is removed using a solution that can dissolve the polymer.